74ALS377 Datasheet - NXP

Octal D flip-flop

74ALS377 Features

* Ideal for addressable register applications

* Enable for address and data synchronization applications

* Eight edge-triggered D-type flip-flops

* Buffered common clock

* See 74ALS273 for master reset version

* See 74ALS373 for transparent latch vers

74ALS377 General Description

The 74ALS377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is Low. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High .

74ALS377 Datasheet (122.47 KB)

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74ALS377

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NXP ↗

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122.47 KB

Description:

Octal d flip-flop.
INTEGRATED CIRCUITS 74ALS377 Octal D flip flop with enable Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Phil.

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74ALS377 Octal flip-flop NXP

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74ALS377 Features

74ALS377 General Description

Datasheet Details

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