74ALVC125 Datasheet - NXP

74ALVC125 Quad buffer/line driver

74ALVC125 The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC125 consists of four non-inverting .

74ALVC125 Features

* Wide supply voltage range from 1.65 to 3.6 V

* Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V)

* 3.6 V tolerant inputs/outputs

* CMOS low power consumption

* Direct interface with TTL levels (2.7 to

74ALVC125_PhilipsSemiconductors.pdf