74ALVCH16652 Datasheet - NXP

74ALVCH16652 16-bit transceiver/register

The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the ‘A’ or ‘B’, or both buses, will be stored .

74ALVCH16652 Features

* In accordance with JEDEC standard no. 8-1A

* CMOS low power consumption

* MULTIBYTE™ flow-through pin-out architecture

* Low inductance, multiple supply and ground pins for minimum noise and ground bounce

* Direct interface with TTL levels

* All data

74ALVCH16652 Datasheet (103.24 KB)