74AUC1G08GV Datasheet - NXP

74AUC1G08GV Single 2-input AND gate

74AUC1G08 The 74AUC1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disable.

74AUC1G08GV Features

* Wide supply voltage range from 0.8 to 2.7 V

* Performance optimised for VCC = 1.8 V

* High noise immunity

* Complies with JEDEC standard:

* JESD76 (1.65 to 1.95 V)

* ESD protection:

* HBM EIA/JESD22-A114-A exceeds 2000 V

* MM EIA/JESD

74AUC1G08GV_PhilipsSemiconductors.pdf