74F113 Datasheet, flip-flops equivalent, NXP

74F113 Features

• Flip-flops individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function

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74F113

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NXP ↗

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📄 Datasheet

Description:

Dual j-k negative edge-triggered flip-flops. The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complemen

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74F113

NXP

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