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74LVC2G07 Buffers

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Description

INTEGRATED CIRCUITS DATA SHEET 74LVC2G07 Buffers with open-drain outputs Product specification Supersedes data of 2004 Mar 19 2004 Sep 08 Philips Se.
74LVC2G07 The 74LVC2G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device superior to most advanced CMOS compatible TTL families.

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Features

* Wide supply voltage range from 1.65 V to 5.5 V
* 5 V tolerant input/output for interfacing with 5 V logic
* High noise immunity
* Complies with JEDEC standard:
* JESD8-7 (1.65 V to 1.95 V)
* JESD8-5 (2.3 V to 2.7 V)
* JESD8B/JESD36 (2.7 V to

Applications

* using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC2G07 provides two non-inverting buffers. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LO

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