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74LVC2G34 DUAL BUFFER GATE

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Description

INTEGRATED CIRCUITS DATA SHEET 74LVC2G34 Dual buffer gate Product specification Supersedes data of 2003 Jul 25 2004 Sep 10 Philips Semiconductors P.
74LVC2G34 The 74LVC2G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL familie.

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Features

* Wide supply voltage range from 1.65 V to 5.5 V
* 5 V tolerant input/output for interfacing with 5 V logic
* High noise immunity
* Complies with JEDEC standard:
* JESD8-7 (1.65 V to 1.95 V)
* JESD8-5 (2.3 V to 2.7 V)
* JESD8B/JESD36 (2.7 V to

Applications

* using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC2G34 provides two buffers. TYPICAL 3.8 2.4 2.5 2.2 1.9 2.5 20 ns ns ns ns ns UNIT pF pF 2004 Sep 10 2 Philips Semiconductors Product specification

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