SAA7157 Datasheet - NXP

SAA7157 Clock signal generator circuit for digital TV systems SCGC

The SAA7157 generates all clock signals required for a digital TV system suitable for the SAA715x family and the SAA7199B (DENC). The circuit operates in either the phase-locked loop mode (PLL) or voltage controlled oscillator mode (VCO). QUICK REFERENCE DATA SYMBOL VDDA VDDD IDDA IDDD VLFCO fi VI V.

SAA7157 Features

* Clock generation suitable for digital TV systems (line-locked)

* PLL frequency multiplier to generate 4 times of input frequency SAA7157

* Dividers to generate clocks LL1.5A, LL1.5B, LL3A and LL3B (4th and 2nd multiples of input frequency)

* PLL mode or VCO mode s

SAA7157 Datasheet (80.12 KB)