* GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION CD-DSP interface and data input Error correction and EDC check Host interface Subcode channel Q-to-W buffering External buffer memory Sub-CPU registers Register Descriptions Sub-CPU interface H
SAA7388
226.64 KB
Error correction and host interface.
INTEGRATED CIRCUITS
DATA SHEET
SAA7388 Error correction and host interface IC for CD-ROM (ELM)
Preliminary speciļ¬cation File under Integrated Circui.
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