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SAA7388 - Error correction and host interface

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SAA7388 Product details

Description

QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION CD-DSP interface and data input Error correction and EDC check Host interface Subcode channel Q-to-W buffering External buffer memory Sub-CPU registers Register Descriptions Sub-CPU interface Host registers CD-DSP Timings LIMITING VALUES THERMAL CHARACTERISTICS CHARACTERISTICS TIMING CHARACTERISTICS Q-to-W subcode interface timing External memory SRAM timing External memory DRAM timing Sub-CPU interface timing

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