NHI1582ET
FEATURES
- GENERAL FEATURES
. . . BUS CONTROLLER HIGHLIGHTS . . REMOTE TERMINAL HIGHLIGHTS . . BUS MONITOR HIGHLIGHTS . . . BLOCK DIAGRAM . . . . PROTOCOL CHIP DESCRIPTION
. . HOST BUS INTERFACE UNIT . . . I/O BUS INTERFACE UNIT . . . INTERRUPT CONTROL UNIT . . . ICU REGISTERS . . . . INTERRUPT DEFINITION TABLE . . ICU FIFO
- DUAL REDUNDANT FRONT END . . MANCHESTER DECODER . . . MANCHESTER ENCODER . . . GAP COUNTER . . . . RT
- RT NO RESPONSE COUNTER . . MINIMUM RESPONSE TIME COUNTER . FAIL -SAFE TIMEOUT COUNTER . . MESSAGE PROCESSOR UNIT . . RT HARDWIRE TERMINAL ADDRESS. . DATA STRUCTURE . . . . ADDRESS MAP . . . . INTERNAL REGISTERS . . . CONTROL
- POINTER TABLE ADDRESS . . . BASIC STATUS . . . . INTERRUPT REQUEST . . . INTERRUPT MASK . . . . INTERRUPT VECTOR . . . . CONFIGURATION REGISTER 2 . . AUXILIARY VECTOR REGISTER . . REAL- TIME CLOCK . . . . RTC CONTROL REGISTER . . . FIFO READ
- FIFO RESET
- LAST MAND REGISTER . . . LAST STATUS...