54LS114 - Dual JK Flip-Flop

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National Semiconductor

Part number	54LS114
Manufacturer	National Semiconductor
File Size	98.18 KB
Description	Dual JK Flip-Flop
Datasheet	54LS114 Datasheet
Additional preview pages of the 54LS114 datasheet.

The ’LS114

individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inputs may be allowed to change when the Clock Pulse is HIGH and the bistable will perform according to the truth table as long as the minimum setup times are observed Input data is transferred to the outputs on the negative-going edge of the clock pulse Connection Diagram Dual-In-Line Package Logic Symbol TL F 10176.

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Published: Aug 25, 2017 |