54LS114 Datasheet - National Semiconductor

54LS114, Dual JK Flip-Flop

54LS114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears June 1989 54LS114 Dual JK Negative Edge-Triggered Flip-Flop with Com.
The ’LS114 features individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data wi.

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Datasheet Details

Part number:

54LS114

Manufacturer:

National Semiconductor

File Size:

98.18 KB

Description:

Dual JK Flip-Flop

Features

* individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inputs may be allowed to change when the Clock Pulse is HIGH and the bistable will perform according to the truth table as

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54LS114 Dual Flip-Flop National Semiconductor

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