CD40162BC Datasheet PDF - National Semiconductor (CD40160BM - CD40163BM) Decade Counter Specs

CD40162BC - (CD40160BM - CD40163BM) Decade Counter

This page provides the datasheet information for the CD40162BC, a member of the CD40163BMJ (CD40160BM - CD40163BM) Decade Counter family.

Datasheet Summary

Description

These (synchronous presettable up) counters are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors They feature an internal carry look-ahead for fast counting schemes and for cascading packages without additional gating A low level

Features

Y Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Internal look-ahead for fast counting schemes Carry output for N-bit cascading Load control line Synchronously programmable Equivalent to MC14160B MC14161B MC14162B MC14163B Equivalent to MM74C160 MM74C161 MM74C162 MM74C163 Connection Diagram Dual-In-Line Package Order Number CD40160B CD40161B CD40162B or CD40163B TL F 5986.

Datasheet Details

Part number	CD40162BC
Manufacturer	National Semiconductor
File Size	Direct Link
Description	(CD40160BM - CD40163BM) Decade Counter
Datasheet	CD40162BC Datasheet
Additional preview pages of the CD40162BC datasheet.

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Full PDF Text Transcription

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CD40160BM BC Decade Counter with Asynchronous CD40162BM BC Synchronous Clear CD40161BM BC Binary Counter with Asynchronous CD40163BM BC Synchronous Clear March 1988 CD40160BM CD40160BC Decade Counter with Asynchronous Clear CD40161BM CD40161BC Binary Counter with Asynchronous Clear CD40162BM CD40162BC Decade Counter with Synchronous Clear CD40163BM CD40163BC Binary Counter with Synchronous Clear General Description These (synchronous presettable up) counters are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors They feature an internal carry look-ahead for fast counting schemes and for cascading packages without additional gating A low level at the load input disables counting and causes the outputs to agree with the da

Published: Jan 4, 2006 |