Datasheet4U Logo Datasheet4U.com

CD4017BC - Decade Counter/Divider

Datasheet Summary

Description

The CD4017BM CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit The CD4022BM CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit These counters are cleared to their zero count by a logical ‘‘1’’ on their reset line

Features

  • Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Medium speed operation Low power Fully static operation Y Y 3 0V to 15V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS 5 0 MHz (typ ) with 10V VDD 10 mW (typ ).

📥 Download Datasheet

Datasheet preview – CD4017BC

📁 Similar Datasheet

  • CD4017B - CMOS COUNTER/DIVIDERS (RCA)
  • CD4017B - CMOS COUNTER/DIVIDERS (Texas Instruments)
  • CD4017BE - CMOS COUNTER/DIVIDERS (Texas Instruments)
  • CD4017BMS - CMOS Counter/Dividers (Intersil Corporation)
  • CD4017BMS - CMOS Counter/Dividers (Renesas)
  • CD4017 - CMOS COUNTER/DIVIDERS (Texas Instruments)
  • CD4017 - Pulse width modulation circuit (HLF)
  • CD40174B - CMOS HEX D-TYPE FLIP-FLOP (Texas Instruments)
  • CD40174B - CMOS HEX D-TYPE FLIP-FLOP (RCA)
  • CD40174BE - CMOS HEX D-TYPE FLIP-FLOP (Texas Instruments)
Other Datasheets by National Semiconductor

Full PDF Text Transcription

Click to expand full text
CD4017BM CD4017BC Decade Counter Divider with 10 Decoded Outputs CD4022BM CD4022BC Divide-by-8 Counter Divider with 8 Decoded Outputs March 1988 CD4017BM CD4017BC Decade Counter Divider with 10 Decoded Outputs CD4022BM CD4022BC Divide-by-8 Counter Divider with 8 Decoded Outputs General Description The CD4017BM CD4017BC is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit The CD4022BM CD4022BC is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit These counters are cleared to their zero count by a logical ‘‘1’’ on their reset line These counters are advanced on the positive edge of the clock signal when the clock enable signal is in the logical ‘‘0’’ state The configuration of the CD4017BM CD4017BC and CD4022BM CD4022BC permit
Published: |