| Part number | CGS74C802, CGS64C800 |
|---|---|
| Manufacturer | National Semiconductor ↗ |
| File Size | 402.18 KB |
| Description | Low Skew PLL 1-to-8 CMOS Clock Driver |
| Datasheet |
 CGS64C800-NationalSemiconductor.pdf
|
| Note |
This datasheet PDF includes multiple part numbers: CGS74C802, CGS64C800. Please refer to the document for exact specifications by model. |
Q ,!') These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop.The phase lock loop allows for outputs to lock-on to either SyncLO or SyncL1 inputs, which could be operating at different frequencies.This product is ideal for applications requiring clock synchronization and distribution of either on or off board components.The PLL uses a counter and a digital to analog convertor for its charge
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