* Y 8-bit high speed parallel registers Y Positive edge-triggered D-type flip-flops Y Fully buffered common clock and enable inputs Connection Diagram Dual-In-Line Package TL F 9831
* 1 Order Number DM54LS377E DM54LS377J DM54LS377W DM74LS377WM or DM74LS377N See NS Package Number E20A J20A M
DM54LS377 Datasheet (360.19 KB)
DM54LS377
National Semiconductor
360.19 KB
Octal d flip-flop.
Obsolete
DM54LS377 DM74LS377 Octal D Flip-Flop with Common Enable and Clock
May 1992
DM54LS377 DM74LS377 Octal D Flip-Flop with Common Enable and C.
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