* n Operates from ±5V to ±18V supplies n Less than 10 µs acquisition time n TTL, PMOS, CMOS compatible logic input n 0.5 mV typical hold step at Ch = 0.01 µF n Low input offset n 0.002% gain accuracy n Low output noise in hold mode n Input characteristics do not change during hold mode n High supply r
LF398A
National Semiconductor
514.56 KB
Monolithic sample-and-hold circuits.
LF198/LF298/LF398, LF198A/LF398A Monolithic Sample-and-Hold Circuits
July 2000
LF198/LF298/LF398, LF198A/LF398A Monolithic Sample-and-Hold Circuits
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