LMC568 Datasheet (National Semiconductor) - Low Power Phase-Locked Loop

LMC568, Low Power Phase-Locked Loop

The LMC568 is an amplitude-linear phase-locked loop consisting of a linear VCO, fully balanced phase detectors, and a carrier detect output.

LMCMOS™ technology is employed for high performance with low power consumption.

The VCO has a linearized control range of ± 30% to allow demodulation of FM and

LMC568 Features

* n n n n n n Demodulates ± 15% deviation FM/FSK signals Carrier Detect Output with hysteresis Operation to 500 kHz input frequency Low THD

* 0.5% typ. for ± 10% deviation 2V to 9V supply voltage range Low supply current drain Typical Application (100 kHz input frequency, refer to notes pg.