L1N06C
features current limiting for short circuit protection, integrated Gate- Source clamping for ESD protection and integral Gate- Drain clamping for over- voltage protection and technology for low on- resistance. No additional gate series resistance is required when interfacing to the output of a MCU, but a 40 k W gate pulldown resistor is remended to avoid a floating gate condition.
The internal Gate- Source and Gate- Drain clamps allow the device to be applied without use of external transient suppression ponents. The...
