MC100EP35 - JK Flip-Flop

ON Semiconductor

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Datasheet Details

Part number	MC100EP35
Manufacturer	ON Semiconductor
File Size	167.14 KB
Description	JK Flip-Flop
Datasheet	MC100EP35_ONSemiconductor.pdf

MC100EP35 Product details

Description

The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip-flop.The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.The reset pin is asynchronous and is activated with a logic HIGH.The 100 Series contains temperature compensation.

Features

410 ps Propagation Delay.
Maximum Frequency > 3 GHz Typical.
PECL Mode Operating Range:.
VCC = 3.0 V to 5.5 V with VEE = 0 V.
NECL Mode Operating Range:.
VCC = 0 V with VEE =.
3.0 V to.
5.5 V.
Open Input Default State.
Q Output Will Default LOW with Inputs Open or at VEE.
These Devices are Pb-Free, Halogen Free and are RoHS Compliant www. onsemi. com 8 1 SOIC.
8 NB D SUFFIX CASE 751.

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Published: Apr 9, 2007 |