MC100H606 - Registered Hex TTL/PECL Translator
MC100H606 Features
* differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input. With its differential PECL outputs and TTL inputs the H606 device is ideally suited for the transmit function of a HPPI bus