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MC10EL34 Clock Generation Chip

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Description

5 V ECL P2, P4, P8 Clock Generation Chip MC10EL34, MC100EL34 .
The MC10/100EL34 is a low skew ÷2, ÷4, ÷8 clock generation chip designed explicitly for low skew clock generation applications.

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Features

* 50 ps Output-to-Output Skew
* Synchronous Enable/Disable
* Master Reset for Synchronization
* PECL Mode Operating Range:
* VCC = 4.2 V to 5.7 V with VEE = 0 V
* NECL Mode Operating Range:
* VCC = 0 V with VEE =
* 4.2 V to
* 5.7

Applications

* The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switchi

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