* 50% 10% tTLH tTHL tPLH tf VDD INHIBIT VSS tf 90% 50% 10% tw 1/fmax tPHL tr VDD VSS Figure 5. Figure 6. tw VDD RESET tr ANY P 90% 50% 10% tPLH tPHL trem ANY Q 50% VDD CLOCK 50% VSS tf VDD VSS ANY Q 50% VSS tPHL 50% Figure 7. Figure 8. VALID tr PRESET ENABLE 90% 50% 10% tPHL tPLH PRESET ENABLE
MC14526B Datasheet (108.84 KB)
MC14526B
108.84 KB
Presettable 4-bit down counters.
MC14526B Presettable 4-Bit Down Counters
The MC14526B binary counter is constructed with MOS P
*channel and N
*channel enhancement mode .
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