NB100LVEP222 Datasheet - ON Semiconductor

NB100LVEP222 1:15 Differential ECL/PECL /1 /2 Clock Driver

PIN CLK0 *, CLK0 * * CLK1 *, CLK1 * * CLK_Sel * MR * Qa0:1, Qa0:1 Qb0:2, Qb0:2 Qc0:3, Qc0:3 Qd0:5, Qd0:5 fseln * VBB VCC, VCC0 VEE * * * NC FUNCTION ECL Differential Input Clock ECL Differential Input Clock ECL Clock Select ECL Master Reset ECL Differential Output.

NB100LVEP222 2.5 V/3.3 V 1:15 Differential ECL/PECL ÷1/÷2 Clock Driver The NB100LVEP222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be used in a differential configuration or single ended (with VBB output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pair.

NB100LVEP222 Features

* C/VCC0. The VIHCMR range is referenced to the most positive side of the differential input signal. LVNECL DC CHARACTERISTICS VCC = VCC0 = 0.0 V; VEE =

* 3.8 V to

* 2.375 V (Note 11)

* 40°C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Vol

NB100LVEP222_ONSemiconductor.pdf