NLV74VHC1G125 Datasheet - ON Semiconductor

NLV74VHC1G125 Noninverting 3-State Buffer

Noninverting 3-State Buffer NLV74VHC1G125, NLV74VHC1GT125 The NLV74VHC1G125 / NLV74VHC1GT125 is a single non inverting 3 state buffer in tiny footprint packages. The NLV74VHC1G125 has CMOS level input thresholds while the NLV74VHC1GT125 has TTL level input thresholds. The internal circuit is composed of three stages, including a buffered 3 state output which provides high noise immunity and stable output. The input structures provide protection when volta.

NLV74VHC1G125 Features

* Designed for 2.0 V to 5.5 V VCC Operation

* 3.5 ns tPD at 5 V (typ)

* Inputs/Outputs Over

* Voltage Tolerant up to 5.5 V

* IOFF Supports Partial Power Down Protection

* Source/Sink 8 mA at 3.0 V

* Available in SC

* 88A, TSOP

* 5 and

NLV74VHC1G125 Datasheet (465.47 KB)