MC8051 Datasheet (Oregano)

MC8051, IP Core

System clock.

Only rising edge used.

Asynchronous reset of all flip-flops.

Timer/counter 0 inputs.

Timer/counter 1 inputs.

Receive data input for serial interface units.

Interrupt 0 inputs.

Interrupt 1 inputs.

Parallel port 0 input.

Parallel port 1 input.

Parallel port 2 input.

Parallel port 3 input

MC8051 Features

* Fully synchronous design Instruction set compatible to the industry standard 8051 microcontroller Optimized architecture enables fast one to four clocks per OP code Up to 10 times faster due to completely new architecture User selectable number of timers/counters as well as serial interface units Ac