RM7000A Datasheet - PMC-Sierra

RM7000A Microprocessor

RM7000A™ Microprocessor with On-Chip Secondary Cache Data Sheet Released RM7000A RM7000A™ Microprocessor with OnChip Secondary Cache Data Sheet Proprietary and Confidential Released Issue 2, May 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use Document ID: PMC-2002227, Issue 2 RM7000A™ Microprocessor with On-Chip Secondary Cache Data Sheet Released Legal Information Copyright © 2001 PMC-Sierra, Inc. The information is proprietary and confidential to PMC-.

RM7000A Features

* changed Highperformance system interface, 133 MHz maximum frequency, multiplexed address/ data to 125 MHz. Changed QED references to PMC-Sierra or MIPS. Updated Section 7, Recommended Operating Conditions and Section 9 Power Consumption. Added System Interface Parameter values, Section 10.3, for 35

RM7000A Datasheet (366.68 KB)