MN101C54 Datasheet - Panasonic Semiconductor

MN101C54 Lower limit for operation guarantee

MN101C54A , MN101C54C Type ROM (× 8-bit) RAM (× 8-bit) Package Minimum Instruction Execution Time MN101C54A 32 K 2K 0.1 µ s (at 4.5 V to 5.5 V, 20 MHz) 0.25 µ s (at 2.7 V to 5.5 V, 8 MHz) 1 62.5 µ s (at 2.0 V to 5.5 V, 32 kHz) 1,2 1 The lower limit for operation guarantee for flash memory built-in type is 4.5 V. 2 The lower limit for operation guarantee for EPROM built-in type is 2.3 V. RESET Watchdog External 0 External 1 Exter.

MN101C54 Features

* d-free Support Tool In-circuit Emulator PX-ICE101C / D + PX-PRB101C54-TPFP080-P-1212D-M (under planning) PX-ICE101C / D + PX-PRB101C54-QFP084-P-1818E-M PX-ICE101C / D + PX-PRB101C54-LQFP080-P-1414A-M Type ROM (× 8-bit) RAM ( × 8-bit) Minimum instruction execution time MN101CP54C 48 K 2K 0.1 µ s (at

MN101C54 Datasheet (378.35 KB)