* CPU core MN103L core (The instruction set is compatible MN103S series) Memory space 4 GB (instruct/data common use) LOAD-STORE architecture (3-stage pipeline) Machine cycle High-speed mode 25 ns/ 40 MHz (Max) Low-speed mode 30.3 ms/ 33 kHz (Max)
* Operation mode NORMAL mode SLO
MN103L19 Datasheet (379.33 KB)
MN103L19
Panasonic Semiconductor
379.33 KB
32-bit single-chip microcontroller.
MN103L09/10/11/12/13/14/15/16/17/18/19/20/ 21/22/23/24/25/26/27 Series
32-bit Single-chip Microcontroller
* Overview
The MN103LF series of 32-bit .
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