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74HCT280 9-bit odd/even parity generator/checker

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Description

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

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Datasheet Specifications

Part number
74HCT280
Manufacturer
Philips
File Size
49.67 KB
Datasheet
74HCT280_PhilipsSemiconductors.pdf
Description
9-bit odd/even parity generator/checker

Features

* Word-length easily expanded by cascading
* Similar pin configuration to the “180” for easy system up-grading
* Generates either odd or even parity for nine data bits
* Output capability: standard

Applications

* 25-line parity generator/checker
* 81-line parity generator/checker TYPICAL SYMBOL PARAMETER tPHL/ tPLH propagation delay In to ∑E In to ∑O CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = inpu

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