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74HCT297 Digital phase-locked-loop filter

74HCT297 Description

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The 74HC/HCT297 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

74HCT297 Features

* Digital design avoids analog compensation errors
* Easily cascadable for higher order loops
* Useful frequency range:
* DC to 55 MHz typical (K-clock)
* DC to 35 MHz typical (I/D-clock)
* Dynamically variable bandwidth
* Very narrow bandwidth

74HCT297 Applications

* These devices contain all the necessary circuits, with the exception of the divide-by-n counter, to build first order phase-locked-loops. Both EXCLUSIVE-OR (XORPD) and edge-controlled (ECPD) phase detectors are provided for maximum flexibility. The input signals for the EXCLUSIVE-OR phase detector

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