74LV20 Datasheet - Philips

74LV20 Dual 4-input NAND gate

The 74LV20 is a low *voltage Si *gate CMOS device and is pin and function compatible with 74HC/HCT20. The 74LV20 provides the 4 *input NAND function. CONDITIONS CL = 15pF VCC = 3.3V Notes 1 and 2 TYPICAL 8 3.5 22 UNIT ns pF pF NOTES: 1 CPD is used to determine the dynamic po.

74LV20 Features

* Optimized for Low Voltage applications: 1.0 to 3.6V

* Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V

* Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V,

* Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V,

* Output capability: standa

74LV20_PhilipsSemiconductors.pdf