Description
The memory array is designed with stacked 1 Gbit DoubleData-Rate-Two (DDR2) Synchronous DRAMs.
[25F/2.5/3/3S/3.7]
B module family are Small Outline modules “SO-DIMMs” wit
Features
- Programmable self refresh rate via EMRS2 setting.
- Programmable partial array refresh via EMRS2 settings.
- Average Refresh Period 7.8 µs at a TCASE lower than 85°C, 3.9µs between 85°C and 95°C.
- DCC enabling via EMRS2 setting.
- All inputs and outputs SSTL_18 compatible.
- Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT).
- Serial Presence Detect with E2PROM.
- SO-DIMM Dimensions (nominal): 30 mm high, 67.6 mm.
HYS64T256022EDL-25F-B_QimondaAG.pdf