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V7001

SDR-SDRAM Memory Controller

V7001 Features

* JEDEC standard SDR-SDRAM supported

* Transaction pipeline for maximum utilization of the Memory Bus

* 3 Request buffers for transaction pipeline

* Supports CAS latencies of 1, 2 and 3

* 4 or 8 beat burst transactions supported

* Supports up to 4 chip

V7001 General Description

Document * Self checking Verification Suite * Synthesis Scripts * Scripts for STA & DFT (optional) QCL_10208_DF_02_Datasheet_rev101 QualCore Logic, Inc. 1289, ANVILWOOD AVENUE SUNNYVALE, CA - 94089, USA Tel: 408 541 0730 Fax: 408 541 0740 E-mail: sales@qualcorelogic.com h.

V7001 Datasheet (67.03 KB)

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Preview of V7001 PDF

Datasheet Details

Part number:

V7001

Manufacturer:

Qualcore

File Size:

67.03 KB

Description:

Sdr-sdram memory controller.

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V7001 SDR-SDRAM Memory Controller Qualcore

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