8 4.
ADDRESS MAPPING 16 5.
REGISTER MAPPING 18 6.
SYSTEM CONFIGURATION 23 REGISTER SUMMARY 25 7.
INTERRUPT CONTROLLER 27 REGISTER SUMMARY 27 8.
MEMORY CONTROLLER 29 REGISTER SUMMARY 29 TIMING DIAGRAM 34 9.
ETHERNET NETWORK INTERFACE CONTROLLER 35 DESCRIPTOR DATA STRUCTURE 36 REGISTER SUMMARY
www.DataSheet4U.com RTL8186/RTL8186P WIRELESS LAN ACCESS POINT/ GATEWAY CONTROLLER Preliminary DATASHEET Rev.
0.9 4 Aug 2004 Track ID: XXXXXXXXX RTL8186 www.DataSheet4U.com COPYRIGHT ©2003 Realtek Semiconductor Corp.
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RTL8186P Features
* Features Core Processor n n n LX5280 32-bit RISC architecture compatible to MIPS R3000 ISA-1 Superscalar architecture, containing 2 execution pipelines with better performance Embedded with 8K I-Cache, 8K D-Cache, 4K I-RAM and 4K D-RAM CONFIDENTIAL 4 PRELIMINARY v0.9 RTL8186 n 16-entry MMU sup
Datasheet Details
RTL8186P, RTL8186
Realtek
1.26 MB
Wireless lan access point/gateway controller.
This datasheet PDF includes multiple part numbers: RTL8186P, RTL8186.
Please refer to the document for exact specifications by model.
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