813N252I-09 Datasheet - Renesas

813N252I-09 VCXO Jitter Attenuator & Synchronous Multiplier

The 813N252I-09 is a PLL based synchronous multiplier that is optimized for PDH or SONET to Ethernet clock jitter attenuation and frequency translation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a VCXO PLL that is optimized to pr.

813N252I-09 Features

* Two LVPECL output pairs Each output supports independent frequency selection at 25MHz, 125MHz, 156.25MHz and 312.5MHz

* Two differential inputs support the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL

* Accepts input frequencies from 8kHz to 155.52MHz including 8

813N252I-09 Datasheet (863.00 KB)