97ULPA877A Datasheet - Renesas

97ULPA877A 1.8V Low-Power Wide-Range Frequency Clock Driver

97ULPA877A Features

* Low skew, low jitter PLL clock driver

* 1 to 10 differential clock distribution (SSTL_18)

* Feedback pins for input to output synchronization

* Spread Spectrum tolerant inputs

* Auto PD when input signal is at a certain logic state Switching Characteristics

Datasheet Details

97ULPA877A

372.79 KB

1.8v low-power wide-range frequency clock driver.

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