Description
7
3. Specifications
11 3.1 Absolute Maximum Ratings
.
Features
- ▪ SMBus Write Protect pin prevents SMBus against accidental writes
▪ 6.
- 12 Low-power HCSL (LP-HCSL) outputs ▪ Integrated terminations eliminate up to 4 resistors
per output pair ▪ Dedicated OE# pins support PCIe CLKREQ#
function ▪ Up to 9 selectable SMBus addresses (9ZXL12xx,
9ZXL0853) ▪ Selectable PLL bandwidths minimizes jitter peaking
in cascaded PLL topologies ▪ Hardware/SMBus control of ZDB and FOB modes
allow change without power cycle ▪ Spread spectrum compatible ▪ 1.
- 400MHz.