CS82C50A-5Z Datasheet PDF - Renesas CMOS Serial Controller Interface Specs

CS82C50A-5Z - CMOS Serial Controller Interface

Datasheet Summary

Description

SYMBOL DISTR, DISTR PIN NUMBER 22 21 TYPE I I DOSTR, 19 I DOSTR 18 I D0-D7 1-8 I/O A0, A1, 28, 27, I A2 26 I XTAL1, 16 I XTAL2 17 O SOUT 11 O GND CTS 20 36 I DSR 37 I DTR 33 O RTS 32 O BAUDOUT 15 O ACTIVE LEVEL H L H L H L L L L L DESCRIPTION DATA IN STRO

Features

Single Chip UART/BRG.
DC to 625K Baud (DC to 10MHz Clock).
Crystal or External Clock Input.
On Chip Baud Rate Generator 1 to 65535 Divisor Generates 16X Clock.
Prioritized Interrupt Mode.
Fully TTL/CMOS Compatible.
Microprocessor Bus Oriented Interface.
80C86/80C88 Compatible.
Scaled SAJI IV CMOS Process.
Low Power - 1mA/MHz Typical.
Modem Interface.
Line Break Generation and Detection.

Datasheet Details

Part number	CS82C50A-5Z
Manufacturer	Renesas
File Size	1.11 MB
Description	CMOS Serial Controller Interface
Datasheet	CS82C50A-5Z Datasheet
Additional preview pages of the CS82C50A-5Z datasheet.

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Full PDF Text Transcription

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82C50A CMOS Asynchronous CMOS Asynchronous The 82C50A Asynchronous Communication Element (ACE) is a high performance programmable Universal Asynchronous Receiver/Transmitter (UART) and Baud Rate Generator (BRG) on a single chip. Using Intersil’s advanced Scaled SAJI IV CMOS Process, the ACE will support data rates from DC to 625K baud (0-10MHz clock). The ACE’s receiver circuitry converts start, data, stop, and parity bits into a parallel data word. The transmitter circuitry converts a parallel data word into serial form and appends the start, parity, and stop bits. The word length is programmable to 5, 6, 7, or 8 data bits. Stop bit selection provides a choice of 1,1.5, or 2 stop bits.

Published: Feb 15, 2021 |