Description
CPU CPU Memory FPU Flash RAM Data flash MCU operating modes Clock Clock generation circuit Power down Power-down function • Maximum operating frequency: 100 MHz • 32-bit RX CPU • Minimum instruction execution time: One instruction in one state (in one system clock cycle) • Address space: 4-Gbyte linear address • Register set of the CPU General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit register • Basic instructions: 73 • Floating-point operation instructions: 8 • DSP instructions: 9 • Addressing modes: 10 • Data arrangement Instructions: Little endian Data: Selectable as little endian or big endian • On-chip 32-bit multiplier: 32 x 32 → 64 bits • On-chip divider: 32 / 32 → 32 bits • Barrel shifter: 32 bits • Single precision (32-bit) floating point • Data types and floating-point exceptions conforming to the IEEE754 standard • Flash capacity: 2 Mbytes (max.) • Three types of on-board programming modes SCI boot mode, user program mode, and user boot mode RAM capacity: 128 Kbytes Data flash capacity: 32 Kbytes Single-chip mode, on-chip ROM enabled extended mode, and on-chip ROM disabled extended mode • One main clock oscillation circuit • Includes a PLL circuit and frequency divider, so the operating frequency is selectable • System clock, peripheral module clock, and external bus clock are independently specifiable.
Key Features
- One basic instruction is executable in one cycle of the system clock
- Facilities for connecting external memory are also included, enabling direct connection to memory and peripheral LSI circuits
Applications
- Overview
