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R5F562TABDFF - 100-MHz 32-bit RX MCUs

Download the R5F562TABDFF datasheet PDF. This datasheet also covers the RX62 variant, as both devices belong to the same 100-mhz 32-bit rx mcus family and are provided as variant models within a single manufacturer datasheet.

Description

Maximum operating frequency: 100MHz 32-bit RX CPU Minimum instruction execution time: One instruction per state (cycle of the system clock) Address space: 4-Gbyte linear Register set of the CPU General purpose: Sixteen 32-bit registers Control: Nine 32-bit r

Features

  • 32-bit RX CPU core.
  • Max. operating frequency: 100 MHz Capable of 165 DMIPS in operation at 100 MHz.
  • Single precision 32-bit IEEE-754 floating point.
  • Accumulator handles 64-bit results (for a single instruction) from 32- × 32-bit operations.
  • Multiplication and division unit handles 32- × 32-bit operations (multiplication instructions take one CPU clock cycle).
  • Fast interrupt.
  • Divider (fastest instruction execution takes two CPU clock cycles).
  • Fast interrup.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (RX62-T.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Part Number Description
R5F562TABDFH 100-MHz 32-bit RX MCUs
R5F562TABDFK 100-MHz 32-bit RX MCUs
R5F562TABDFM 100-MHz 32-bit RX MCUs
R5F562TABDFP 100-MHz 32-bit RX MCUs
R5F562TABGFF 100-MHz 32-bit RX MCUs

Full PDF Text Transcription

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DATASHEET RX62T Group, RX62G Group Renesas MCUs R01DS0096EJ0200 100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC (3 S/H circuits, double data register, amplifier, comparator): two units, 10-bit ADC one unit, the three ADC units are Rev.2.00 Jan 10, 2014 capable of simultaneous 7-ch. sampling, 100-MHz PWM (two three-phase complementary channels and four single-phase complementary channels or three three-phase complementary channels and one single-phase complementary channel) Features ■ 32-bit RX CPU core  Max.
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