Description
Maximum operating frequency: up to 120 MHz
Arm Cortex-M4 core:
- Revision: r0p1-01rel0 - ARMv7E-M architecture profile - Single precision floating-point unit compliant with the ANSI/IEEE Std 754-2008.
Arm Memory Protection Unit (Arm MPU): - Armv7 Protected Memory System Architecture - 8 protect regions.
SysTick timer: - Drive
Features
- and advanced analog. Features.
- Arm Cortex-M4 Core with Floating Point Unit (FPU).
- Armv7E-M architecture with DSP instruction set.
- Maximum operating frequency: 120 MHz.
- Support for 4-GB address space.
- On-chip debugging system: JTAG, SWD, and ETM.
- Boundary scan and Arm Memory Protection Unit (Arm MPU).
- Memory.
- Up to 1-MB code flash memory (40 MHz zero wait states).
- 32-KB data flash memory (125,000 erase/write cycles).
- Up to 384-KB SRAM.
- Fla.
R7FA6M2AF2CLK-Renesas.pdf