Description
Maximum operating frequency 112-pin FBGA: 450 MHz
32-bit CPU Cortex-R4 designed by Arm (core revision r1p4)
Address space: 4 Gbytes
Instruction cache: 8 Kbytes (with ECC)
Data cache: 8 Kbytes (with ECC)
Tightly coupled memory (TCM)
ATCM: 512 Kbytes (with ECC) BTCM: 32 Kbytes (with ECC)
Instruction set: Arm v7-R architecture, so support includes Thumb® and Thumb-2
Data arrangement Instructio
Features
- On-chip 32-bit Arm Cortex-R4 processor.
- High-speed realtime control with maximum operating frequency of 450 MHz Capable of 747 DMIPS (in operation at 450 MHz).
- On-chip 32-bit Arm Cortex-R4 (revision r1p4).
- Tightly coupled memory (TCM) with ECC: 512 Kbytes/32 Kbytes.
- Instruction cache/data cache with ECC: 8 Kbytes per cache.
- High-speed interrupt.
- The FPU supports addition, subtraction, multiplication, division, multiply-and-accumulate, and square-root operation.