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R9A02G020 ASSP EASY

R9A02G020 Description

Datasheet R9A02G020 ASSP EASY for motor control based on RISC-V R01DS0396EJ0110 Rev.1.10 Apr 15, 2022 Ultra low power 32 MHz RISC-V Andes N22 core,.
Maximum operating frequency: up to 32 MHz. Andes AndesCore N22:. Revision: 1. RISC-V instruction-set architecture (IS.

R9A02G020 Features

* Features
* RISC-V Andes N22 Core
* RISC-V instruction-set architecture (RV32I)
* Maximum operating frequency: 32 MHz
* Andes Physical Memory Protection unit (Andes PMP)
* Debug and Trace: RISC-V External Debug Support
* Debug Port: JTAG
* Memory
* 48-KB code flash

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