X95820 Datasheet - Renesas

X95820 Dual Digital Potentiometers

PIN SYMBOL 1 VCC 2 WP 3 RH0 4 RL0 5 RW0 6 A2 7 SCL 8 SDA 9 GND 10 RW1 11 RL1 12 RH1 13 A0 14 A1 DESCRIPTION Power supply pin Hardware write protection pin. Active low. Prevents any “Write” operation of the I2C interface. “High” terminal of DCP0 “Low” terminal of DCP0 “Wiper” terminal of DCP0 Devic.

DATASHEET X95820 Dual Digital Controlled Potentiometers (XDCP™) Low Noise/Low Power/I2C Bus/256 Taps FN8212 Rev 2.00 July 18, 2006 The X95820 integrates two digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the I2C bus interface. Each potentiometer has an associated volatile Wiper Regi.

X95820 Features

* Two potentiometers in one package

* 256 resistor taps-0.4% resolution

* I2C serial interface - Three address pins, up to eight devices/bus

* Wiper resistance: 70 typical @ 3.3V

* Non-volatile storage of wiper position

* Standby current < 5µA max

X95820 Datasheet (1.32 MB)