M393T5750BG Datasheet - SAMSUNG

M393T5750BG (M393Txx5xBG) Registered SDRAM MODULE 240pin Registered Module based

Pin Name CK0 CK0 CKE0, CKE1 RAS CAS WE S0, S1 A0~A9, A11~A13 A10/AP BA0, BA1 SCL SDA SA0~SA2 Par_In Err_Out RESET Description Clock Inputs, positive line Clock inputs, negative line Clock Enables Row Address Strobe Column Address Strobe Write Enable Chip Selects Address Inputs Address Input/Autoprec.

www.DataSheet4U.com 512MB, 1GB, 2GB Registered DIMMs DDR2 SDRAM DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb B-die 72-bit ECC INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED .

M393T5750BG Features

* Performance range D5(DDR2-533) Speed@CL3 Speed@CL4 Speed@CL5 CL-tRCD-tRP 400 533 4-4-4 CC(DDR2-400) 400 400 3-3-3 Unit Mbps Mbps Mbps CK

* JEDEC standard 1.8V ± 0.1V Power Supply

* VDDQ = 1.8V ± 0.1V

* 200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin

M393T5750BG Datasheet (652.68 KB)