SY2305 Datasheet (SANY) - P-Channel logic enhancement mode power field effect transistors

SY2305, P-Channel logic enhancement mode power field effect transistors

The SY2305 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology.

This high density process is especially tailored to minimize on-state resistance.

These devices are particularly suited for low voltage application such as

SY2305 Features

* -15V/-3.5A,RDS(ON)= 70mΩ@VGS=-4.5V -15V/-3.0A,RDS(ON)= 85mΩ@VGS=-2.5V -15V/-2.0A,RDS(ON)=105mΩ@VGS=-1.8V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design PIN CONFIGURATION(SOT-23-3L) PART MARK