74LVX573 Datasheet (ST Microelectronics) - LOW VOLTAGE CMOS OCTAL D-TYPE LATCH

74LVX573, LOW VOLTAGE CMOS OCTAL D-TYPE LATCH

The 74LVX573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is ideal for low power, battery operated and low noise 3.3V applications.

This 8 bit D-Type latch is controlled by a latc

www.DataSheet4U.com 74LVX573 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS s s s s s s s s s s s HIGH SPEED: tPD=6.4ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC =3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC = 3V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING