M36L0R7050 - 128 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 32 Mbit (2M x16) PSRAM
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4 Figure 2.
Logic Diagram .
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4 Table 1.
Signal Names .
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M36L0R7050 Features
* SUMMARY MULTI-CHIP PACKAGE
* 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash Memory
* 1 die of 32 Mbit (2Mb x16) Asynchronous Pseudo SRAM
* SUPPLY VOLTAGE
* VDDF = VDDP = VDDQ = 1.7 to 1.95V
* VPPF = 9V for fast program (12V tolerant)
* EL
