M95128 - 256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock

ST Microelectronics

M95128 Datasheet Preview — Preview of M95128 PDF

Datasheet Details

Part number	M95128
Manufacturer	STMicroelectronics ↗
File Size	174.59 KB
Description	256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock
Datasheet	M95128_STMicroelectronics.pdf

M95128 Product details

Description

These SPI-compatible electrically erasable programmable memory (EEPROM) devices are organized as 32K x 8 bits (M95256) and 16K x 8 bits (M95128), and operate down to 2.7 V (for the Figure 1. Logic Diagram VCC Table 1. Signal Names C D Q Serial Clock Serial Data Input Serial Data Output D C S W M95xxx Q S W HOLD VCC VSS Chip Select HOLD Write Protect Hold Supply Voltage Ground VSS AI01789C March 2000 This is preliminary information on a new product now in development or undergoing evalua

Features

of the memory device are summarized in Table 3. The hardware write protection, controlled by the W pin, restricts write access to the Status Register (though not to the WIP and WEL bits, which are set or reset by the device internal logic). Bit 7 of the status register (as shown in Table 5) is the Status Register Write Disable bit (SRWD). When this is set to 0 (its initial delivery state) it is possible to write to the status register if the WEL bit (Write Enable Latch) has been set by the WREN.

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Published: May 6, 2005 |