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74LVQ138 - 3 TO 8 LINE DECODER INVERTING

Datasheet Summary

Description

The LVQ138 is a low voltage CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is ideal for low power and low noise 3.3V applications.

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Datasheet Details

Part number 74LVQ138
Manufacturer STMicroelectronics
File Size 69.84 KB
Description 3 TO 8 LINE DECODER INVERTING
Datasheet download datasheet 74LVQ138 Datasheet
Additional preview pages of the 74LVQ138 datasheet.

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Full PDF Text Transcription

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® 74LVQ138 3 TO 8 LINE DECODER (INVERTING) s s s s s s s s s s s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 IMPROVED LATCH-UP IMMUNITY M1 (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ138M 74LVQ138T If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low.
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